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 Post subject: AMD rolls out its 65-nanometer chips
PostPosted: Tue Dec 05, 2006 12:23 am 
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From http://news.com.com/AMD+rolls+out+its+6 ... 40764.html:

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AMD rolls out its 65-nanometer chips
Chips will consume about 30 percent less energy than the same chips produced on the 90-nanometer process when running at the same speed.


Advanced Micro Devices has started to ship chips made on the 65-nanometer process, as the manufacturing spat with Intel heats up.

AMD chips made on the 65-nanometer process will consume about 30 percent less energy than the same chips produced on the 90-nanometer process when running at the same speed. In the first chips shipped on this process, virtually all of the benefit comes in reduced power consumption, said Nick Kepler, vice president of logic technology development at AMD.

Later, the company will balance energy conservation and performance gain, depending on what the designers want to achieve with various desktop, notebook and server chip designs, he said.

The improvements in part come because AMD is straining the silicon in the transistors inside its chips with a silicon germanium film to improve performance, a first for the company.

Straining silicon improves the performance of transistors because the larger germanium atoms slightly rearrange the silicon atoms and thereby allow electrical carriers to move more rapidly. In the N-channel transistors, which carry negative electrons, germanium spreads out the lattice of the silicon; electrons flow more freely, sort of like a deer running through a forest that's been thinned of trees. In P-channel transistors, which carry positive charges, the germanium compresses the silicon atoms.

"We planned it (silicon germanium) all along with 65-nanometer, but we were prepared to pull the plug on it if it didn't add up to a benefit," Kepler said. "Adding embedded silicon germanium is probably the biggest change."

To create strain in its existing 90-nanometer chips, AMD (and IBM) inserted a technology called Dual Stress Liners, which is different straining the silicon germanium. Intel already uses silicon germanium extensively.

AMD's 65-nanometer chips will still include Dual Stress Liners, but also include silicon germanium on the P-channel transistors. The N-channel transistors, meanwhile, will get additional strain from something called Stress Memory Technology. With SMT, AMD inserts a film into the N-transistors and then eliminates it: although gone, the earlier existence changes the structure enough to create a strain. (AMD outlined these changes at a conference in 2005.)

SMT, Kepler added, is not a variant of another strain technique first discussed by IBM, which involves inserting and then evaporating the germanium layer.

The first chips produced by AMD on the new process will be desktop chips. Notebook and server chips will come in the relatively near future.

Intel and AMD are in the midst of a manufacturing battle. Intel first began shipping 65-nanometer chips in October 2005. Chips made on the 65-nanometer process generally provide more performance and/or consume less power than those made on the older 90-nanometer process. (The nanometer figure refers to the average size of features on the chip; a nanometer is a billionth of a meter).

Chips popped out on the more advanced processes also cost less to produce. Intel's 14-month lead in manufacturing has been one of the primary reasons it has been able to undercut AMD in some segments.

By moving into production with its first 65-nanometer chips, AMD can now start to try to erode that advantage. By the middle of next year, all of the chips coming out of AMD's Fab 36 in Dresden, Germany, (one of the two fabs AMD has there) will be only 65-nanometer chips.

Kepler also reiterated the company's goal of shipping chips on the 45-nanometer process in 18 months, a shorter than normal time period between manufacturing nodes. If successful, this will cut Intel's manufacturing advantage to about six to seven months.

But it won't be easy to do. The 45-nanometer transition is expected to be more complex than the 65-nanometer transition. Both AMD and IBM are committed to adopting immersion lithography--a technique where the silicon wafer is immersed in purified water to better focus the light beams that "draw" circuits on its surface--for 45-nanometer manufacturing. No one has moved into mass manufacturing with this technique yet. Intel will not adopt it for 45-nanometer manufacturing.

"Eighteen months to 45nm is tough but doable," wrote Risto Puhakka, an analyst at VLSI Research in an email. "Intel is concerned about the maturity of immersion lithography in their roadmaps...AMD is ramping 45nm later, which gives immersion time to mature, so in that sense the immersion is easier to choose."

While AMD is now one of the premier manufacturing outfits in the world, it still sometimes hits delays. The company shipped its first 90-nanometer chips in August 2004. Thus, the 90- to 65-nanometer jump took 28 months. Some analysts expected AMD to come out with 65-nanometer chips toward the middle of 2006.

The complex 130- to 90-nanometer jump took even more time. AMD was originally supposed to come out with 90-nanometer chips at the end of 2003. Intel had delays too, but has kept closer to the two-year timetable for transitions outlined by Moore's Law.

One thing that could make the transition to 45-nanometers easier for both companies is that the transition won't likely be as radical as it could have been. At one time, both AMD and Intel contemplated doing things like coming out with multiple gate transistors and changing the basic materials in their transistors at 45-nanometer. Now these changes will wait until further transitions.


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 Post subject:
PostPosted: Tue Dec 05, 2006 1:43 am 
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The Inq's take below.

http://www.theinquirer.net/default.aspx?article=36162

Shouldnt this deserve to be in the CPU section.??? I know this is beneficial to green computing, but its not a revolutionary step.

My take on these CPU's.

If AMD can compete better with Intel then we the buyers are the real winners, not wanting to take anything away from AMD though, they deserve what they have achieved, and need to keep on pushing technology to compete with the Evil Empire.


Andy

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 Post subject:
PostPosted: Tue Dec 05, 2006 3:14 am 
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Quote:
AMD chips made on the 65-nanometer process will consume about 30 percent less energy than the same chips produced on the 90-nanometer process


Wow, I gotta have me one of those! I was going to buy an X2 but I'll probably wait now til the 65nm parts are available.


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 Post subject:
PostPosted: Tue Dec 05, 2006 3:11 pm 
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Moved to CPU forum.

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 Post subject:
PostPosted: Tue Dec 05, 2006 3:21 pm 
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Sorry Neven, at least it will get more people looking at it than before.

AMD and Intel chips both have a sliding scale for power usage, but they throw every chip "core disign" into the same bracket, which is plain wrong, a 2800+ Sempron thats rated at 62W will use much less than that, and I doubt that the top of the line Sempron actually uses 62W anyway.

It would be very interesting to see someone identify how much power each different CPU actually uses (obviously each sample will be different anyway, so it wont be perfect).


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 Post subject:
PostPosted: Tue Dec 05, 2006 9:36 pm 
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andyb wrote:
AMD and Intel chips both have a sliding scale for power usage, but they throw every chip "core disign" into the same bracket, which is plain wrong, a 2800+ Sempron thats rated at 62W will use much less than that, and I doubt that the top of the line Sempron actually uses 62W anyway.

AMD calls it "Thermal Design Power" for a reason. It shows that the processor will not use more than that amount of power. If a computer is designed to dissipate 62w of heat as an upper limit the OEM or person making the computer can stick any TDP 62W processor in the PC and not have overheating problems.

I'm more interested in the claim that idle has drop from 7w to 3w.


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 Post subject:
PostPosted: Wed Dec 06, 2006 4:02 am 
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dragmor wrote:
I'm more interested in the claim that idle has drop from 7w to 3w.

7.5W to 3.8W, but yeah, much more interesting indeed. Considering they didn't change the core, they must've done some excellent work on leakage on their 65nm process. C2D is said to be 14.3W on idle, and K8 still has a memory controller and some NB-functionality extra.
Some information on die size and possible core improvements would be cool though, haven't found much on that.


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 Post subject:
PostPosted: Wed Dec 06, 2006 5:04 am 
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Quote:
C2D is said to be 14.3W on idle


Xbitlabs measured 26W at idle, EIST enabled:

http://www.xbitlabs.com/articles/cpu/di ... ent_6.html


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 Post subject:
PostPosted: Wed Dec 06, 2006 1:44 pm 
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jaganath wrote:
Quote:
C2D is said to be 14.3W on idle


Xbitlabs measured 26W at idle, EIST enabled:

http://www.xbitlabs.com/articles/cpu/di ... ent_6.html

Yeah, that's true.

And, Xbitlabs measured 26W at idle, EIST disabled:

http://www.xbitlabs.com/articles/cpu/di ... ut_11.html


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 Post subject:
PostPosted: Wed Dec 06, 2006 2:03 pm 
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So what's going on? :? From the C2D shootout, apparently the highest-clocked chip (X6800) has a lower idle power than the E6300! That can't be right surely?


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 Post subject:
PostPosted: Wed Dec 06, 2006 2:19 pm 
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jaganath wrote:
So what's going on? :? From the C2D shootout, apparently the highest-clocked chip (X6800) has a lower idle power than the E6300! That can't be right surely?

I think it can, they're probably doing a binning based on power consumption, but I'm not sure. Lostcircuits reported the same results at idle, and they're also showing that the E6300 and the much faster E6700 uses the same amount of power under load!

EIST doesn't work like it should, apparantely. I have no idea if you can get around this with third party software like RMClock, and I can't recall if/what SmilingCrow have reported about it. I hope the B3 stepping will fix this.


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 Post subject:
PostPosted: Fri Dec 08, 2006 9:51 am 
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jaganath wrote:
Wow, I gotta have me one of those! I was going to buy an X2 but I'll probably wait now til the 65nm parts are available.

Why's that? You can get a 65W 90nm part now for less $$$, and the 65nm parts are 65W, so what's the advantage?


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 Post subject:
PostPosted: Fri Dec 08, 2006 11:22 am 
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I assumed the 65nm parts will see a 30% reduction across the board; so the standard 65nm X2 will use less than the 90nm, the "65W" version of the 65nm will use less (say 45W) and the EESFF 65nm will use less than the 90nm EESFF; tell me if that's not a correct assumption.


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 Post subject:
PostPosted: Fri Dec 08, 2006 11:28 am 
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jaganath wrote:
I assumed the 65nm parts will see a 30% reduction across the board; so the standard 65nm X2 will use less than the 90nm, the "65W" version of the 65nm will use less (say 45W) and the EESFF 65nm will use less than the 90nm EESFF; tell me if that's not a correct assumption.

There haven't been any announcements about lower power versions of them yet. So, it's hard to say. If anything the 90nm version gives you a slightly larger core to extract the heat from.


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 Post subject:
PostPosted: Fri Dec 08, 2006 12:41 pm 
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Quote:
If anything the 90nm version gives you a slightly larger core to extract the heat from.


It also gives you more heat that needs to be extracted, so no net advantage. The power density is probably very similar between the two chips.


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 Post subject:
PostPosted: Fri Dec 08, 2006 1:42 pm 
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jaganath wrote:
It also gives you more heat that needs to be extracted, so no net advantage.

There is an advantage when they're both 65W, as is the current case.


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 Post subject:
PostPosted: Fri Dec 08, 2006 1:47 pm 
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It would give an advantage if we were talking about a Prescott, where heat extraction is the no.1 priority, but that is not the case with any recent AMD CPU. The heat loads are so modest any slight differences in CPU-IHS transfer gets lost in the noise.


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 Post subject:
PostPosted: Fri Dec 08, 2006 6:15 pm 
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I thought the current 90nm 65W CPU's only are available in 512kB L2 cache, while the new Brisbanes will be available in 1MB L2 cache with the same 65W.

The current 90nm with 1MB L2 cache are only available in 89W (and higher for the FX CPU's).


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 Post subject:
PostPosted: Fri Dec 08, 2006 6:57 pm 
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According to The Inquirer they're 512k L2 parts. That would make sense since the 65nm 2.1gHz part is a 4000+, where the 90nm 2.0gHz part is a 3800+ and the 90nm 2.2gHz part is a 4200+.


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 Post subject:
PostPosted: Fri Dec 08, 2006 7:29 pm 
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Hm... :?

AMD 65nm X2 debut 5 december

Quote:
Four Brisbanes are expected at launch: the Athlon 64 X2 4000+, 4400+, 4800+ and 5000+, clocked at 2.1GHz, 2.3Ghz, 2.5GHz and 2.6GHz, respectively. They're all TDP-rated at 65W and contain 1MB of L2 cache.


I got the info from a Dutch site, also stated 1MB L2 cache:
More about AMD's 65nm plans


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 Post subject:
PostPosted: Fri Dec 08, 2006 9:28 pm 
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That's 1MB total, look here.

Quote:
I assumed the 65nm parts will see a 30% reduction across the board; so the standard 65nm X2 will use less than the 90nm, the "65W" version of the 65nm will use less (say 45W) and the EESFF 65nm will use less than the 90nm EESFF; tell me if that's not a correct assumption.

I guess so, especially if revision G was here to stay fo a while, but that's not the case. It will be replaced within 9 months by a new core, and the question is if AMD will/can do this in such short time. Maybe the 65 nm isn't that good yet? At least I guess they can, but they have other priorities as well. In the end, 35 W should be easier to achieve with 65 nm than with 90 nm. This die shrink will most of all be needed for T64 X2 since they're now stuck at 2 GHz, and a new version won't show up for at least a year AFAIK. But then again I don't think it's difficult for them to make a 65 nm SFF since they're already checks indivdual TDP on every CPU.

But who would really need a SFF CPU? (Not talking about Dell or HP.) As I've said before, 2.4 GHz 65 W = 2.0 GHz 35 W when you're undervolting and underclocking (well, almost, you get a few watts difference), so you're pretty much giving away money for a more limited product (lower multiplier) when you're buying a 35 W X2 3800+. The SFF cost €167 more than the 65 W 4600+, it's more expensive than ever. People got like crazy when they first read about this CPU, but no one thought that a 65 W X2 4600+ (or even 4800+) was just as good in terms of power usage if needed, and much faster if needed. And I know that a certain Vcore/MHz/W is never guaranteed when changing stock values, but I'd take that risk.

History will repeat itself, the 2.6 GHz, 65 W 5000+ - still lower price than the old SFF X2 3800+ - will probably be forgotten when a new X2 SFF shows up, which probably will be just as expensive and impossible to find as the old one. But if AMD stays at 2 GHz and 35 W, then prices will drop, of course.


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PostPosted: Thu Dec 14, 2006 4:11 pm 
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Apparently Anandtech is on crack, or they don't know how to apply a HSF consistently.

The chip with the 2nd highest power consumption (ignoring the C2D) has the lowest temperature? Assuming they used the same HSF for all their testing it doesn't make any sense. All the AMD chips have the same size heat spreader so the HSF should be equally capable of extracting power from each core. More power = more heat. Yet, their review shows something different.


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 Post subject:
PostPosted: Thu Dec 14, 2006 7:16 pm 
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Mats wrote:
And, Xbitlabs measured 26W at idle, EIST disabled:


EIST is not interesting for idle. C1E is kicking in instead. I created a new thread for discussing this

EIST vs C1E on intel Core CPUs
http://www.silentpcreview.com/forums/vi ... hp?t=36560


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 Post subject:
PostPosted: Thu Dec 14, 2006 7:18 pm 
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Don't forget to report about the 1.1V lock once you get your hands on one :)

reporting thread: http://www.silentpcreview.com/forums/vi ... hp?t=34083


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 Post subject:
PostPosted: Thu Dec 14, 2006 7:46 pm 
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Current 65nmers are 512 x s = 1mb

These are slightly better because they OC the same but need LESS energy.

If that is the case I'm guessing they should undervolt better as well. Meaning less heat.

The only thing about the 65nm that are very different are the multipliers. Half multi's. Wonder how memory will react to that.


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 Post subject:
PostPosted: Thu Dec 14, 2006 10:04 pm 
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AMD's 65nm Brisbane Core Previewed: The most energy efficient AMD CPU to date
http://www.anandtech.com/cpuchipsets/sh ... spx?i=2889
This is great ... and it can only get better ... :)


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PostPosted: Thu Dec 21, 2006 5:34 pm 
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This article is far more informative.

http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=2893&p=1

As was asked before it begs the question why not just an X2 3800+ 90 nm in the 65W category? Clearly there are going to be some teething problems here that I don't care to address. The 3800+ X2 65W can be had for $130 today, and the new cpus will not have price drops.

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 Post subject:
PostPosted: Thu Dec 21, 2006 6:00 pm 
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Quote:
The 3800+ X2 65W can be had for $130 today


Dang, the normal X2 is more like $180 in the UK; God I hate our ripoff prices!! :evil:


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PostPosted: Thu Dec 21, 2006 7:27 pm 
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jaganath wrote:
Quote:
The 3800+ X2 65W can be had for $130 today


Dang, the normal X2 is more like $180 in the UK; God I hate our ripoff prices!! :evil:


No price difference here.

Don't get upset, we just hide our taxes better than you guys.

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 Post subject:
PostPosted: Fri Dec 22, 2006 12:19 am 
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aristide1 wrote:
jaganath wrote:
Quote:
The 3800+ X2 65W can be had for $130 today


Dang, the normal X2 is more like $180 in the UK; God I hate our ripoff prices!! :evil:


No price difference here.

Don't get upset, we just hide our taxes better than you guys.

It's the same here in Sweden, and in most other European countries, not just the UK.
The X2 3800+ with the lowest price here in Sweden costs $183 (same for EE and standard),
and if you remove the taxes (25 %) you get $147, pretty close to the list price of $152.
But then again, we can always complain about taxes...


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