For a long time, each new generation of chips increases single thread clock for clock performance by about 20%.

It appears that Haswell CPU might be way different. I read that it would have a "Massive increase in clock for clock single threading performance compare to Sandy Bridge(2.5x) and Ivy Bridge(1.9x)." on wikipedia. Here is the interesting part. I went back to look at this again.... and it was gone!

I went looking a little more and found it several other places, but then again it was quickly scrubbed.

See:

http://www.answers.com/topic/haswell-microarchitecture
compared to google cache:
http://webcache.googleusercontent.com/s ... ridge(2.5x)+and+Ivy+Bridge(1.9x).&cd=2&hl=en&ct=clnk&gl=us&source=www.google.com

http://www.facebook.com/pages/Intel-Has ... 2382375337
compared to google cache:
http://webcache.googleusercontent.com/s ... ridge(2.5x)+and+Ivy+Bridge(1.9x).&cd=1&hl=en&ct=clnk&gl=us&source=www.google.com
(webcache.googleusercontent.com/search?q=cache:-yOJXwYWRtkJ:www.facebook.com/pages/Intel-Haswell/143082382375337+%22clock+for+clock%22+Sandy+Bridge(2.5x)+and+Ivy+Bridge(1.9x).&cd=1&hl=en&ct=clnk&gl=us&source=www.google.com)

Even the caches are getting scrubbed:

on the following search on google about noon on May 3, 2011
"clock for clock" Sandy Bridge(2.5x) and Ivy Bridge(1.9x).
I got the following three results:

Intel Haswell | Facebook - 11:48am
Massive increase in clock for clock single threading performance compare to Sandy Bridge(2.5x) and Ivy Bridge(1.9x). 160/128-bit QPI 3.0 datapath support. ...
www.facebook.com/pages/Intel-Haswell/143082382375337 - Cached
Haswell: Information from Answers.com
Massive increase in clock for clock single threading performance compare to Sandy Bridge(2.5x) and Ivy Bridge(1.9x). 160/128-bit QPI 3.0 datapath support. ...
www.answers.com › Library › Travel & Places - Cached
Haswell (microarchitecture) - Ask Jeeves Encyclopedia
Apr 28, 2011 ... Massive increase in clock for clock single threading performance compare to Sandy Bridge(2.5x) and Ivy Bridge(1.9x). ...
uk.ask.com/wiki/Haswell_(microarchitecture) - United Kingdom - Cached

When I went to look at the cache for uk.ask.com it has been scrubbed. The thumbnail information displayed in the google search results was no longer on the page or even in the cache page????

Compare:
http://uk.ask.com/wiki/Haswell_(microarchitecture)
with
http://webcache.googleusercontent.com/s ... chitecture)+%22clock+for+clock%22+Sandy+Bridge(2.5x)+and+Ivy+Bridge(1.9x).&cd=3&hl=en&ct=clnk&gl=us&source=www.google.com

(webcache.googleusercontent.com/search?q=cache:qr1rpwaSz-QJ:uk.ask.com/wiki/Haswell_(microarchitecture)+%22clock+for+clock%22+Sandy+Bridge(2.5x)+and+Ivy+Bridge(1.9x).&cd=3&hl=en&ct=clnk&gl=us&source=www.google.com)

Here both the page and the cache have been cleaned of information that showed up in the google search thumbnail.


Does anyone have an explanation about what they heck is going on? Maybe however is going around scrubbing this information will find this post and explain what the heck is going on... and why they are going to such great effort to scour this correct (or incorrect) information from the internet.

Why care? Haswell isn't that far away. Ivy Bridge is due around the end of 2011 and Haswell is due around the end of 2012. If there is going to be that big a jump in performance at the end of 2012, I might delay some of my purchasing decisions. No strike that. I will delay some of my purchasing decisions.

Would someone else be kind enough to confirm what I found on these two caches before they get cleaned (or replaced) as well?

http://www.answers.com/topic/haswell-microarchitecture
compared to google cache:
embedded long URL #1

http://www.answers.com/topic/haswell-microarchitecture
compared to google cache:
embedded long URL #2

Maybe some folks didn't understand their NDA or something? We'll hopefully have some facts to go on, soon?

There's always stuff like this on the web, and while there may a degree of truth there's probably plenty of speculation and maybe even some downright misinformation. So.... the future of Intel's CPUs. After Ivy Bridge that is. Let's see. There's going to Haswell, then there's going to be Broadwell and then there's going to be SkyLake or is it Sky Lake, and then Skymont. Skymont is rumoured to be a 11 nm part. http://semiaccurate.com/2011/03/31/after-intels-haswell-comes-broadwell-sk/. But even if it happens, Skymont is going to be when, 2015? 2016? So I don't think these stories of future Intel developments affect potential Intel hardware buyers now, in 2011 but they are entertaining. For AMD they may be positively scary but that's another issue.

As to waiting for new hardware, I don't think so. The introduction of Ivy Bridge for example is as likely to be decided by marketing reasons as for technical reasons. If AMD's Bulldozer and Llano CPUs make more of an inroad into Sandy Bridge than expected then Ivy Bridge might arrive sooner I would suspect. But given that AMD's new hardware won't be here until June/July I don't see Intel being in any hurry and Ivy Bridge is probably going to be Spring 2012. It's not as if these new introductions obsolete the previous generations overnight, my local hardware dealer still stocks 775 and 1156 motherboards and CPUs.

If they are the same architecture, why would sandy and ivy differ in CPI? (as implied by those figures)

What attracted my attention was the scrubbing. If it is just BS.... what is all the effort to scrub it from the internet?

As to Intel taking it easy on AMD, that makes sense to me and you.... but apparently Intel never got the memo... they don't seem to have let their prior introduction cycles slide to take it easy on AMD.

In fact Intel has a whole new generation of competitors coming at them using the ARM architecture. Microsoft is even porting Windows to this architecture. I think that has Intel a bit paranoid.

AMD perhaps no longer counts even as a putative competitor any more... at least of any material concern.

What is CPI? Do you mean the amount of work done per cycle?

It seems like this have been increasing with each generation.... about 20 to 25%. In fact that is where it seems the performance increases have been coming from. Non-overclocked speed doesn't appear to be moving much.

The implied change from SB to Ivy appears to be about 25% (the difference between 2.5 and 1.7 divided by 2.5) which is what i would be expecting. How they do more work per cycle.... beats me what pixie dust they use.... but with each generation they seem to find it.

But almost doubling performance in one generation.... that would require a whole lot of pixie dust.

But for some reason, for some years now they haven't been able to really move the gHz by much. I guess that must be much harder.... probably hitting up against more basic limitations of physics.

Work done per cycle is more a problem of logic... how to solve a problem in 3 steps instead of 10 steps. How many cycles you generate per second is limited by constraints imposed by physics.

Let me get this straight, you are getting all excited about an anonymous edit to a Wikipedia article? And the fact that it was deleted (just like any other nonsense) somehow makes it more trustworthy?

Not exactly the way I was thinking about it... but its one way to look at it.

Though there were two other sites..... and hey the number were accurate to the decimal point.....

This huge jump in performance makes more sense today than it did two days ago. Intel may what they consider a mile stone announcement today. They consider it to be the most important announcement they will be making all year.

Intel apparently has mastered high production volume 3d transistor fabrication. They are starting with Ivy Bridge.... but Ivy Bridge is basically going to be using the current architecture.

Once they can get 3D fabrication under their belt with Ivy Bridge, they have a lot more options open to them than they did before. They will be able to implement things that they never could consider before.

A doubling of computer power in one generation now seems much more plausible... perhaps even expected. With the IB "Tick" they will get 3d fabrication working. With the Haswell "Tock" they will get creative in how they use 3D fabrication.

I think I am going to defer as much as of my buying as I can until the Haswell "Tock".

I also wonder what implications this 3d capability may have for Intel SSD endurance. It appears to me that the implementation for Ivy Bridge... by tripling the surface area over which electrons can travel should improve endurance.... maybe by more than 3x times. Anyone an out there an expert on this. Please leave a comment on this supposition.

See:
http://www.eetimes.com/electronics-news ... TimesDaily

I'm in semiconductor design, and I don't think it will have much if any affect on SSDs. Flash transistors have two gates, a metal gate that's connected to the rest of the design and a floating gate that isn't connected to anything. I'm not sure how they'd do a floating gate finfet type transistor, that will probably come a lot later if at all. The floating gate is charged and discharged by tunnel current, and for that you want the space between the main gate and the floating gate to be very specific. I'd imagine that it would be hard to guarantee that spacing while wrapping the gates over a little silicon fin.

The fact that they're using it for ivy bridge also suggests that SSD is not what they're thinking about here. In their processors, they typically want simple high performance high yield transistors, and that's what this would be best for right off the bat. But don't count on it being 3 times the surface area, that's not how it works. Basically, instead of having the gate electric field affect the conduction channel only from one side, this design should cut it off from two sides. Depending on how they dope the channel, they should be able to get much lower leakage, or they could get it running at lower gate voltages, but however they tweak it performance should improve, but it won't be a simple linear factor.

Actually, just checked Anandtech and they have some nice pictures, take a look: http://www.anandtech.com/show/4313/intel-announces-first-22nm-3d-trigate-transistors-shipping-in-2h-2011

What about my supposition that once they have mastered fabricating in 3D, that other options open up to them (other than tri-gate) and that using the ability to do 3D fabrication they may be able to create things other than tri-gate that could substantially improve not just energy efficiency... but also raw performance?

Intel Reinvents Transistors Using New 3-D Structure - Will Tri-Gate Save Moore's Law?
http://www.legitreviews.com/news/10620/

Youtube Video
http://www.legitreviews.com/news/10621/

Intel Reinvents Transistors Using New 3-D Structure
New Transistors for 22 Nanometer Chips Have an Unprecedented Combination of Power Savings and Performance Gains
http://forums.legitreviews.com/about34252.html

Eh, that's a pretty iffy supposition. Reading the description in the EETimes, it's 'a couple more' double patterning steps. So it's not a super huge fab change, doesn't make any difference to logic, it doesn't open up new design vistas or anything. It might be vaguely useful to some of the analog guys, but you're not going to see positronic brains or anything. And this isn't even particularly new, most foundries assume that they'll get to these type of transistors in a few years, there's been R&D on this for something like 5 to 10 years. I remember reading about these things in an article many years ago about technologies to keep Moore's law going. It's vaguely surprising to see one of them come to pass, but it's not some super revolutionary thing, it's really more evolutionary. This is basically another cost/benefit step, in Intel's estimation the extra processing cost in now worth the ROI. Now I can't really speculate about what else Intel is working on, if you want to do that, hey, go nuts.

Darn

Cordis

About a year ago there was a great hoopla about the memresistor that was supposed to be memory that was also capable of being used for combined memory and calculation purposes. It was supposed to be able to be fabricated using silicon fabrication technology.
http://www.hp.com/hpinfo/newsroom/press ... 408xa.html
http://en.wikipedia.org/wiki/Memristor

It was also supposed to be being commercialized about the same time as Haswell is to be launched. Were they blowing smoke up our rear or is it plausible (or implausible) that we could see some limited deployment of such technology in small portions of CPUs in he next few years?

Does the 3D fabrication capability make it easier to deploy memresistor technology... or is it not relevant to the ease or difficulty of deploying memresistor technology?

Well, memristors are a completely different category. They're typically fabricated with titanium dioxide, and they've been fabricated in conjunction with silicon processes, but they aren't really 'compatible' per se. You can toss a layer or two above your transistors, and they've been trying that. But it's new technology, new materials, new circuits, new designs, so it'll take a while to get up to speed. This '3d' transistor technology has nothing to do with memristors. It's possible that we might see some limited production in a couple years in dedicated memory chips, but I doubt we'll see it much of anything for 5 to 10 years. Case in point, I looked up FinFets on wikipedia, it turns out that TSMC made a demo FinFet in 2002, so I'm betting that those were in R&D for more than 10 years before now. Before memristors get into cpus, they're going to have to demonstrate easy fabrication, high reliability, and real improvements over existing technology. And as we've seen, existing technology doesn't exactly sit still, so it's hard for anything new to catch up. Memristors may offer some significant advantages, so they may find some use at some point, but I'm thinking that it won't really be in a couple of years. Take all the hype you hear with a little skepticism, everybody.

And that goes triple for this 'Haswell' rumor you read. I wouldn't trust any comparsions about work per cycle, those are always easy to fudge. What does that even mean, really, more cores? More hyperthreading? Pipeline changes? More branch prediction? More execution units? Could mean anything, really, I wouldn't get too worked up about it.

With respect to Ivy Bridge (as opposed to the subsequent Haswell generation):

"The move could get Intel into smartphones and tablet computers, which is dominated by low powered designs from ARM.

Intel said that its new chips would be "extremely competitive" with ARM on power consumption."

"The belief is that it the design should allow it to advance at least a generation ahead of its rivals."

http://www.fudzilla.com/processors/item ... transistor

CPI is somewhat archaic "cycles per instruction", and I guess IPC (instructions per cycle) or something would be more timely, but I only know of people saying CPI .

Point is, Ivy is the Intel "tock" of Sandy, and should be the same architecture on a new process. They may switch up some details, but the CPI should not change radically (and 25% is pretty radical). Any increase in per-unit-time performance would be more likely due to higher clock rates allowed by the new process, but this is not included in "clock for clock" performance, per OP (although maybe he mis-spoke?).

Am I mistaken? Perhaps there are larger architectural changes involved in this "tock". (I don't really keep up with the year-out hardware)

That may be... but it does seem like this tick or tock is a bit different. The 3D transistors appear to make a substantial change in energy usage.

Intel is claiming that they have caught up with ARM in energy usage... using a full fledged CPU. One analyst claims this advance pushes them an extra generation ahead.... (don't know if he is talking about a single tick or a tick plus a tock)

I guess we will have to see to what extent they extract that advantage from this in Ivy Bridge. As you indicated it can be converted to speed or to a lower TDP or some combination thereof.

What will be real interesting will be to see what they will do with it with the nest generation Haswell.

"Intel's 3D transistor fuels tablet fight with ARM"
http://www.computerworld.com/s/article/ ... onomyId=15

Granted, its not forthcoming, but wouldn't ARM moving to a tri-gate process nullify any Intel advantage?

I know Intel loves the x86 ISA (or is linked to it with an unbreakable diamond tether), but I don't see why they insist on using a cannon to target a fly (and in a market where existing applications are already non-compatible due to screen resolutions and input devices). Unless they are pandering to a certain Redmond company, but that company does not seem to be reciprocating with their next product.

So it might be possible to run Windows 8 on the Trim-Slice ARM/Tegra 2 desktop PC http://trimslice.com/web/. Is this what an HTPC will look like in 2012/13?

Well, keep in mind that ARM is actually a fabless design company, ARM doesn't have any fabs. Actually ARM is usually 2 steps removed from the fab. They license designs to other fabless companies (like Broadcom and Marvell) who use whatever foundry they want (usually TSMC). There are some companies like Samsung that license the design and have their own fab, so I guess that's only one step. So ARM will have to wait for a foundry to start making FinFets. The most predictable contender is TSMC, they've done the research and were going to add the capability in their 14nm process node. Not sure if they'll move it up now, they might. Global Foundries (the spun off AMD foundry) will probably also be feeling the pressure from AMD, but I'm not sure if they have any big ARM cpu contracts. So it isn't really in ARMs control, but it wouldn't surprise me if a foundry or two moved up their plans to match Intel.

That is a good point. I think it is only a question of when they do it.

But related to that is how soon they are able to do it. If they trail by 3 months... its not a big deal. If they trail by 3 years... it is game over.

More good points. The key determinant will be if an alternative foundry can keep tempo with Intel. If someone is willing and able to keep tempo with Intel we will have a real horse race.... and us customers win.

If no one is willing and able to keep tempo... I guess we win as well... just not as much.

I think so if Intel wills it. Sandy Bridges already idle at almost no watts. Take a dual core 2100 and cut its full load TDP in half.

Then take its support chips and cut their draw in half. Why not? I think you are talking maybe less than 30 watts at full load.

5-10 years from now it seems we'll be using sub 30W CPU-GPU fusion computers and SSDs. At that point SPCR might have to throw in the towel, it's hard to imagine any sources of noise being left.

I truly believe that is about 2 years away. Sandy Bridge is stable and established now. In 12 months Ivy Bridge. In another 24 months Haswell.

Ivy Bridge sort of gets us there. Haswell for certain.

But by then it will not be important. Hardware capability is outpacing software burden on the desktop.

That struggle is now moving to phones and ipads. That is where the action will be.

A core 2 Duo has all the horsepower most people need. That was 2 generations ago. MS bloat just isn't what is used to be.

Ivy Bridge to process media up to 4X faster

"Intel now claims that the new CPU and its integrated graphics can process media up to 4X faster."

http://www.fudzilla.com/processors/item ... -4x-faster