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PostPosted: Mon Dec 01, 2003 9:51 am 
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The actual amd/sse link is here.

FYI, I have an AMD id cheat sheet that shows pics of most of the processors. The Palamino core is the only one that does NOT have the little raised bridge thingies surrounding the core. In other words, the surface of the Palimino chip is smooth while the T'Bird/T'Bred/Barton all have 5 "bridges" on the top and bottom of the core - plus a few others kinda sprinkled around the chip. Top is defined as the side with "AMD" printed on it.

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PostPosted: Mon Dec 01, 2003 10:22 am 
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ColdFlame wrote:
3) Every time I get a new WU I need to restart F@H because somehow it "forgets" about the -forceasm switch and does not use SSE on subsequent WUs

Get the 3.25beta or 4.00beta client. This was a bug with 3.24.

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PostPosted: Mon Dec 01, 2003 11:13 am 
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So apart from the fact that I can't understand amd supporting SSE in Duron model 7 but not 8, could you tell me mas92264 which Model relate to which core name. Is the Morgan the model 7 which support the SSE and the new Applebread the one not supporting it (model 8 ).

If that's correct I'll be better getting a 1300 morgan which is also cheaper than an Applebread. Only the latter has a 266 FSB instead of 200FSB which will be reflected in a worse overall perform for the Morgan, but i just won't tell my brother :twisted:

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PostPosted: Mon Dec 01, 2003 1:52 pm 
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You're correct. Morgan core is model 7, and Applebred is model 8. However, the Applebred core DOES seem to support SSE. Check out this page for a screenshot of WCPUID. http://www.pctuner.net/php/Articoli/Articolo.php?ID=237


Btw, if you do any overclocking, the Applebred might be worth the extra money as they are supposed to overclock fairly well.


Last edited by Lockheed on Mon Dec 01, 2003 5:44 pm, edited 1 time in total.

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PostPosted: Mon Dec 01, 2003 3:00 pm 
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Yes, I've read about Applebred supporting SSE, but it's all so confusing. Why would AMD tell only Model 7 Duron supporting it. Or maybe they just didn't update that FAQ after they release the new Duron model, who knows. About overclockability i've read that too, and about bridging L1 to get a Tbred.

It seems a pretty good proc for its price, but being unable to use 266 FSB with the old Mobo my brother have, I'm not that sure. Also for about 46 euros maybe I should go with a 1800 XP which cost 59 euros, and the 1.3 morgan for 36. I'll have to think about it.

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PostPosted: Mon Dec 01, 2003 3:32 pm 
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Mormakil:

I read through the data sheets re: Duron model 7 & 8 and did a search for SSE. The term "SSE" does not exist in either model # description, which tells us nothing. Maybe an actual email to amd will result in more definitive info?

With respect to other ids' of amd processors, this is what I've figured out so far (others feel free to point out errors.) This list excludes MP & mobile & Thorton.

Model 4 - Thunderbird, from speed ? up to 1400. These are non-XPs' without SSE. 133 fsb and maybe 100.

Model 6 - Palomino, 1500xp to 2100xp, all with SSE. 133fsb.

Model 8 - Thoroughbred, 1600xp to 2700xp, all with SSE 133/166 fsb.

Model 10 - Barton, 166/200 fsb, all with SSE.

I thought there was a 1400xp also, but, don't know where it fits in.

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PostPosted: Mon Dec 01, 2003 3:42 pm 
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It seems a pretty good resume for me, thanks. It's a bit fustrating AMD publishing technical documents on the web that don't tell anything about the instructions sets they support :evil: . Before asking AMD about this, I will asume that when from a lot of different places you could read that both Morgan and Applebred have SSE and even from AMDs faq Model 7 including SSE, it's logical to think that Model 8 will have it too.

Also, it seems that Durons Applebred are somehow Tbred which don't passes all the controls and were limited to 128 L2 cache. Some may work well enabling this cache and some don't, even if demand grows AMD could start selling perfectly good Tbreds limited as Durons, as it has done in the past with other procs. But maybe when they get aware of people getting the same for less they will cut out, as it has happens with the Bartons which now come speed limited.

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PostPosted: Mon Dec 01, 2003 11:16 pm 
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Here is an interesting thread about why SSE is the default for Intel chips and not-enabled for Athlons. In short, it says that all cores after Palomino are subject to lockups with SSE enabled when processing Gromacs cores. Ironically, Palomino is the one core with no reported problems of lockups with SSE enabled. In other words, if you have a Palomino core, definitely DO enable the assembly optomizations with -forceasm. If you have a T-bred or Barton, it might be OK and you might experience the odd lockup.

Supposedly nobody (at the Panda group anyway) has been able to reliably reproduce the problem, so it is not known whether the error is in the Athlon processors or in the Gromacs core. The workaround is that SSE is simply disabled by default on all Athlons.

What I took away from the above thread is that if you enable SSE, and you do not experience lockups, count yourself lucky and leave it enabled. If you experience lockups, the only reliable solution is to remove -forceasm or -forceSSE.

Keep in mind though, it's a 14 page thread and I did only skim the last page, so feel free to disagree with my conclusions.

I wonder though, how widespread is this problem? How many Athlon CPU's does it affect? 1 in 10? 1 in 10-thousand? I have no idea. This is just one thread, and maybe only a handful of people in the entire world have ever had trouble, but have made a big bruhaha about it. It does make me think back to why I put my Athlon and VIA chipset board on the shelf in favor of an Intel solution - I got tired of these weird and niggling little incompatibilities. So now I am considering Athlon/VIA again, and I wonder if I am repeating past mistakes.

David

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PostPosted: Mon Dec 01, 2003 11:28 pm 
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Err... I have a 2000+ XP Palomino and I have experienced a hard lockup with 1 particular WU. I haven't ever experienced a hard lockup on my machine before so I'm pretty sure it is caused by that WU. I also erased that particular WU and got a new one and it was okay. All subsequent WUs were just fine.

Bottom line: my Palomino is also subjective to that issue. Frankly, I don't believe that the issue is with AMD otherwise all games would lock up too (I assume they use SSE a lot). It must be some hard-to-repro bug in Gromacs core (no pun intended).

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PostPosted: Mon Dec 01, 2003 11:42 pm 
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ColdFlame wrote:
It must be some hard-to-repro bug in Gromacs core (no pun intended).

I suspect this also.

[OT] The most frustrating thing with VIA/AMD was always that it gave companies, whom I called for support, a built-in excuse. They would ask what chipset I was using and when I told them, they would just say "Well there you go" and that would be that. Plausible deniability. With an Intel cpu and chipset in an Intel board, they don't have that excuse. Of course, the irony is I have found my Intel board no more stable than any other, and in fact I would have to say it has been a bit LESS stable than my Abit and ASUS boards.

It was, and IS, a difficult situation for me personally because my brother WORKS for VIA. If for no other reason, I am anxious to give them another chance. [/OT]

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PostPosted: Tue Dec 02, 2003 1:27 pm 
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Slightly OT but I purchased one of the first motherboards based on KT400 chipset and it's been rock stable for me since. Not a single issue (unless I'm overclocking).

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